CY54FCT841T是TI公司的一款D类锁存器产品，CY54FCT841T是具有三态输出的 10 位总线接口 D 类锁存器，本页介绍了CY54FCT841T的产品说明、应用、特性等，并给出了与CY54FCT841T相关的TI元器件型号供参考。
CY54FCT841T - 具有三态输出的 10 位总线接口 D 类锁存器 - D类锁存器 - 触发器/锁存器/寄存器 - TI公司（Texas Instruments，德州仪器）
The \x92FCT841T bus-interface latches are designed to eliminate additional packages required to buffer existing latches and provide additional data width for wider address/data paths or buses carrying parity. The \x92FCT841T devices are buffered 10-bit-wide versions of the FCT373 function.
The \x92FCT841T devices\x92 high-performance interface is designed for high-capacitance-load drive capability, while providing low-capacitance bus loading at both inputs and outputs. Outputs are designed for low-capacitance bus loading in the high-impedance state.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
- Function, Pinout, and Drive Compatible With FCT, F, and AM29841 Logic
- Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions
- Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
- Ioff Supports Partial-Power-Down Mode Operation
- Matched Rise and Fall Times
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
- Fully Compatible With TTL Input and Output Logic Levels
- High-Speed Parallel Latches
- Buffered Common Latch-Enable Input
- 3-State Outputs
- CY54FCT841T
- 32-mA Output Sink Current
- 12-mA Output Source Current
- CY74FCT841T
- 64-mA Output Sink Current
- 32-mA Output Source Current
