DAC5670是TI公司的一款高速DAC(>10MSPS)产品,DAC5670是14 位 2.4GSPS 数模转换器,本页介绍了DAC5670的产品说明、应用、特性等,并给出了与DAC5670相关的TI元器件型号供参考。
DAC5670 - 14 位 2.4GSPS 数模转换器 - 高速DAC(>10MSPS) - 数模转换器 - TI公司(Texas Instruments,德州仪器)
The DAC5670 is a 14-bit 2.4-GSPS digital-to-analog converter (DAC) with dual demultiplexed differential input ports. The DAC5670 is clocked at the DAC sample rate and the two input ports run at a maximum of 1.2 GSPS. An additional reference bit input sequence is used to adjust the output clock delay to the data source, optimizing the internal data latching clock relative to this reference bit with a delay lock loop (DLL). Alternatively, the DLL may be bypassed and the timing interface managed by controlling DATA setup and hold timing to DLYCLK.
The DAC5670 also can accept data up to 1.2 GSPS on one input port the same clock configuration. In the single port mode, repeating the input sample (A_ONLY mode), 2 times interpolation by zero stuff (A_ONLY_ZS mode), or 2 times interpolation by repeating and inverting the input sample (A_ONLY_INV) are used to double the input sample rate up to 2.4 GSPS.
The DAC5670 operates with a single 3-V to 3.6-V supply voltage. Power dissipation is 2 W at maximum operating conditions. The DAC5670 provides a nominal full-scale differential current-output of 20 mA, supporting both single-ended and differential applications. An on-chip 1.2-V temperature-compensated bandgap reference and control amplifier allows the user to adjust the full-scale output current from the nominal 20 mA to as low as 5 mA or as high as 30 mA. The output current can be directly fed to the load with no additional external output buffer required. The device has been specifically designed for a differential transformer coupled output with a 50-Ω doubly-terminated load.
The DAC5670 is available in a 252-ball GDJ package. The device is characterized for operation over the temperature range 40°C to 85°C.
- 14-Bit Resolution
- 2.4-GSPS Maximum Update Rate Digital to Analog Converter
- Dual Differential Input Ports
- Even/Odd Demultiplexed Data
- Maximum 1.2 GSPS Each Port, 2.4 GSPS Total
- Dual 14-Bit Inputs + 1 Reference Bit
- DDR Output Clock
- DLL Optimized Clock Timing Synchronized to Reference Bit
- LVDS and HyperTransport™ Voltage Level Compatible
- Internal 100-? Terminations for Data and Reference Bit Inputs
- Selectable 2 Times Interpolation With Fs/2 Mixing
- Differential Scalable Current Outputs: 5 mA to 30 mA
- On-Chip 1.2-V Reference
- 3.3-V Analog Supply Operation
- Power Dissipation: 2 W
- 252-Ball GDJ Package
- APPLICATIONS
- Test and measurement: Arbitrary Waveform Generator
- Communications
All other trademarks are the property of their respective owners