SN65LVDS104是TI公司的一款差动产品，SN65LVDS104是1:4 LVDS 时钟扇出缓冲器，本页介绍了SN65LVDS104的产品说明、应用、特性等，并给出了与SN65LVDS104相关的TI元器件型号供参考。
SN65LVDS104 - 1:4 LVDS 时钟扇出缓冲器 - 差动 - 时钟缓冲器 - TI公司（Texas Instruments，德州仪器）
The SN65LVDS104 and SN65LVDS105 are a differential line receiver and a LVTTL input (respectively) connected to four differential line drivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). LVDS, as specified in EIA/TIA-644 is a data signaling technique that offers low-power, low-noise coupling, and switching speeds to transmit data at relatively long distances. (Note: The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other system characteristics.)
The SN65LVDS104 and SN65LVDS105 are characterized for operation from –40°C to 85°C.
The SN65LVDS104 and SN65LVDS105 are members of a family of LVDS repeaters. A brief overview of the family is provided in the table below.
- Receiver and Drivers Meet or Exceed the Requirements of ANSI EIA/TIA-644 Standard
- SN65LVDS105 Receives Low-Voltage TTL (LVTTL) Levels
- SN65LVDS104 Receives Differential Input Levels, ±100 mV
- Typical Data Signaling Rates to 400 Mbps or Clock Frequencies to 400 MHz
- Operates From a Single 3.3-V Supply
- Low-Voltage Differential Signaling With Typical Output Voltage of 350 mV and a 100- Load
- Propagation Delay Time
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