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SN74AHC16373 - 产品图解:
SN74AHC16373-具有三态输出的 16 位透明 D 类锁存器
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TI产品 - SN74AHC16373介绍
SN74AHC16373 - 具有三态输出的 16 位透明 D 类锁存器

SN74AHC16373是TI公司的一款D类锁存器产品,SN74AHC16373是具有三态输出的 16 位透明 D 类锁存器,本页介绍了SN74AHC16373的产品说明、应用、特性等,并给出了与SN74AHC16373相关的TI元器件型号供参考。

SN74AHC16373 - 具有三态输出的 16 位透明 D 类锁存器 - D类锁存器 - 触发器/锁存器/寄存器 - TI公司(Texas Instruments,德州仪器)

产品描述

The 'AHC16373 devices are 16-bit transparent D-type latches with 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

These devices can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels at the D inputs.

A buffered output-enable (OE\) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

OE\ does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The SN54AHC16373 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74AHC16373 is characterized for operation from -40°C to 85°C.

产品特性

  • Members of the Texas Instruments WidebusTM Family
  • EPICTM (Enhanced-Performance Implanted CMOS) Process
  • Operating Range 2-V to 5.5-V VCC
  • Distributed VCC and GND Pins Minimize High-Speed Switching Noise
  • Flow-Through Architecture Optimizes PCB Layout
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Package Options Include Plastic Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), and Thin Very Small-Outline (DGV) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings

EPIC and Widebus are trademarks of Texas Instruments Incorporated.

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