SN74FB1651是TI公司的一款无产品，SN74FB1651是具有缓冲时钟线路的 17 位 TTL/BTL 通用总线存储收发器，本页介绍了SN74FB1651的产品说明、应用、特性等，并给出了与SN74FB1651相关的TI元器件型号供参考。
SN74FB1651 - 具有缓冲时钟线路的 17 位 TTL/BTL 通用总线存储收发器 - 无 - 背板逻辑器件（GTL/TTL/BTL/ECL收发器/转换器） - TI公司（Texas Instruments，德州仪器）
The SN74FB1651 contains an 8-bit and 9-bit transceiver with a buffered clock. The clock and the transceivers are designed to translate signals between TTL and backplane transceiver-logic (BTL) environments. The device is designed specifically to be compatible with IEEE Std 1194.1-1991.
The B\ port operates at BTL-signal levels. The open-collector B\ ports are specified to sink 100 mA. Two output enables (OEB and OEB\) are provided for the B\ outputs. When OEB is low, OEB\ is high, or VCC is less than 2.1 V, the B\ port is turned off.
The A port operates at TTL-signal levels. The A outputs reflect the inverse of the data at the B\ port when the A-port output enable (OEA) is high. When OEA is low or when VCC is less than 2.1 V, the A outputs are in the high-impedance state.
BIAS VCC establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when VCC is not connected.
BG VCC and BG GND are the supply inputs for the bias generator.
- Compatible With IEEE Std 1194.1-1991 (BTL)
- TTL A Port, Backplane Transceiver Logic (BTL) B\ Port
- Open-Collector B\-Port Outputs Sink 100 mA
- BIAS VCC Minimizes Signal Distortion During Live Insertion or Withdrawal
- High-Impedance State During Power Up and Power Down
- B\-Port Biasing Network Preconditions the Connector and PC Trace to the BTL High-Level Voltage
- TTL-Input Structures Incorporate Active Clamping to Aid in Line Termination
