SN74LVC1G125 - 具有三态输出的单路总线缓冲器闸
SN74LVC1G125是TI公司的一款TI芯片产品,SN74LVC1G125是具有三态输出的单路总线缓冲器闸,本页介绍了SN74LVC1G125的产品说明、应用、特性等,并给出了与SN74LVC1G125相关的TI元器件型号供参考。
SN74LVC1G125 - 具有三态输出的单路总线缓冲器闸 - TI芯片 - 小尺寸逻辑器件 - TI公司(Texas Instruments,德州仪器)
产品特性
- Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch
- Supports 5-V VCC Operation
- Inputs Accept Voltages to 5.5 V
- Provides Down Translation to VCC
- Max tpd of 3.7 ns at 3.3 V
- Low Power Consumption, 10-μA Max ICC
- ±24-mA Output Drive at 3.3 V
- Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
产品应用
- Cable Modem Termination System
- High-Speed Data Acquisition and Generation
- Military: Radar and Sonar
- Motor Control: High-Voltage
- Power Line Communication Modem
- SSD: Internal or External
- Video Broadcasting and Infrastructure: Scalable Platform
- Video Broadcasting: IP-Based Multi-Format Transcoder
- Video Communications System
产品说明
This bus buffer gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC1G125 device is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high.
The CMOS device has high output drive while maintaining low static power dissipation over a broad VCC operating range.
The SN74LVC1G125 device is available in a variety of packages including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm.
产品器件信息
DEVICE NAME | PACKAGE | BODY SIZE (NOM) |
---|---|---|
SN74LVC1G125 | SOT-23 (5) | 2.90 mm × 1.60 mm |
SC70 (5) | 2.00 mm × 1.25 mm | |
SON (6) | 1.45 mm × 1.00 mm | |
DSBGA (5) | 1.40 mm × 0.90 mm | |
X2SON (4) | 0.80 mm × 0.80 mm |
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